MC10E404 Datasheet, PDF (1/4 Pages) ON Semiconductor – QUAD DIFFERENTIAL AND/NAND

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Differential AND/NAND
The MC10E404/100E404 is a 4-bit differential AND/NAND device. The
differential operation of the device makes it ideal for pulse shaping
applications where duty cycle skew is critical. Special design techniques
were incorporated to minimize the skew between the upper and lower
level gate inputs.
Because a negative 2-input NAND function is equivalent to a 2-input
OR function, the differential inputs and outputs of the device also allow for
its use as a fully differential 2 input OR/NOR function.
The output RISE/FALL times of this device are significantly faster than
most other standard ECLinPS devices resulting in an increased
bandwidth.
The differential inputs have clamp structures which will force the Q
output of a gate in an open input condition to go to a LOW state. Thus,
inputs of unused gates can be left open and will not affect the operation of
the rest of the device. Note that the input clamp will take affect only if both
inputs fall 2.5V below VCC.
• Differential D and Q
• 700ps Max. Propagation Delay
• High Frequency Outputs
• Extended 100E VEE Range of – 4.2V to – 5.46V
• Internal 75kΩ Input Pulldown Resistors
D3a D3a D3b D3b VCCO Q3 Q3
25 24 23 22 21 20 19
D2b 26
18 Q2
D2b 27
17 Q2
D2a 28
VEE 1
D2a 2
Pinout: 28-Lead PLCC
(Top View)
16 VCC
15 Q1
14 Q1
D1b 3
13 Q0
D1b 4
12 Q0
5 6 7 8 9 10 11
D1a D1a D0b D0b D0a D0a VCCO
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
Function
D[0:4], D[0:4]
Q[0:4], Q[0:4]
Differential Data Inputs
Differential Data Outputs
FUNCTION TABLE
Da
Db
Q
Da
Db
Q
L
L
L
L
L
L
L
H
L
L
H
H
H
L
L
H
L
H
H
H
H
H
H
H
12/93
© Motorola, Inc. 1996
2–1
MC10E404
MC100E404
QUAD DIFFERENTIAL
AND/NAND
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
LOGIC DIAGRAM
D0a
D0a
Q0
D0b
D0b
Q0
D1a
D1a
Q1
D1b
D1b
Q1
D2a
D2a
Q2
D2b
D2b
Q2
D3a
D3a
Q3
D3b
D3b
Q3
REV 2