MC10E241 Datasheet, PDF (1/4 Pages) ON Semiconductor – 8-BIT SCANNABLE REGISTER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8ĆBit Scannable Register
The MC10E/100E241 is an 8-bit shiftable register. Unlike a standard
universal shift register such as the E141, the E241 features internal data
feedback organized so that the SHIFT control overrides the HOLD/LOAD
control. This enables the normal operations of HOLD and LOAD to be
toggled with a single control line without the need for external gating. It
also enables switching to scan mode with the single SHIFT control line.
The eight inputs D0 – D7 accept parallel input data, while S-IN accepts
serial input data when in shift mode. Data is accepted a set-up time
before the positive-going edge of CLK; shifting is also accomplished on
the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the registers to zero.
• SHIFT overrides HOLD/LOAD Control
• 1000ps Max. CLK to Q
• Asynchronous Master Reset
• Pin-Compatible with E141
• Extended 100E VEE Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View)
SEL0 NC D7 D6 D5 VCCO Q7
25 24 23 22 21 20 19
SEL1 26
18 Q6
CLK 27
17 Q5
MR 28
16 VCC
VEE 1
15 NC
S-IN
S-IN 2
D0 3
14 VCCO
13 Q4
D0
D1 4
12 Q3
5 6 7 8 9 10 11
D2 D3 D4 VCCO Q0 Q1 Q2
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
Function
D0 – D7
S-IN
SEL0
SEL1
CLK
MR
Q0 – Q7
Parallel Date Inputs
Serial Data Inputs
SHIFT Control
HOLD/LOAD Control
Clock
Master Reset
Data Outputs
D1 – D6
D7
HOLD/LOAD
SHIFT
CLK
MR
MC10E241
MC100E241
8-BIT SCANNABLE
REGISTER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
LOGIC DIAGRAM
DQ
R
DQ
R
BITS 1–6
DQ
R
Q0
Q1 – Q6
Q7
7/96
© Motorola, Inc. 1996
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