MC10E171 Datasheet, PDF (1/4 Pages) ON Semiconductor – 3-BIT 4:1 MULTIPLEXER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3ĆBit 4:1 Multiplexer
The MC10E/100E171 contains three 4:1 multiplexers with differential
outputs. Separate Select controls are provided for the leading 2:1 mux
pairs (see logic symbol). The three Select inputs control which one of the
four data inputs in each case is propagated to the corresponding output.
• 725ps Max. D to Output
• Split Select
• Differential Outputs
• Extended 100E VEE Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
MC10E171
MC100E171
3-BIT 4:1
MULTIPLEXER
Pinout: 28-Lead PLCC (Top View)
D1b D1a D2d D2c D2b D2a VCCO
25 24 23 22 21 20 19
SEL1A 26
18 Q2
SEL1B 27
17 Q2
SEL2 28
16 VCC
VEE 1
15 Q1
NC 2
14 Q1
NC 3
13 VCCO
D1c 4
12 Q0
5 6 7 8 9 10 11
D1d D0a D0b D0c D0d VCCO Q0
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
D0x – D2x
SEL1A, SEL1B
SEL2
Q0 – Q2
Q0 – Q2
FUNCTION TABLE
Pin
SEL2
SEL1A
SEL1B
State
H
H
H
Function
Data Inputs
First-stage Select Inputs
Second-stage Select Input
True Output
Inverted Output
Operation
Output c/d data
Input d data
Input b data
12/93
© Motorola, Inc. 1996
2–1
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
D0a
D0b
D0c
D0d
D1a
D1b
D1c
D1d
D2a
D2b
D2c
D2d
SEL1A
SEL1B
SEL2
LOGIC DIAGRAM
2:1
MUX
SEL
2:1
Q0
MUX
2:1
MUX
SEL
Q0
SEL
2:1
MUX
SEL
2:1
Q1
MUX
2:1
SEL
Q1
MUX
SEL
2:1
MUX
SEL
2:1
Q2
MUX
2:1
SEL
Q2
MUX
SEL
REV 2