MC10E167_16 Datasheet, PDF (1/8 Pages) ON Semiconductor – 5V ECL 6‐Bit 2:1 MUX‐Registe

MC10E167
5 V ECL 6‐Bit 2:1
MUX‐Register
Description
The MC10E167 contains six 2:1 multiplexers followed by D
flip-flops with single-ended outputs. Input data are selected by the
Select control, SEL. The selected data are transferred to the flip-flop
outputs by a positive edge on CLK1 or CLK2 (or both). A HIGH on
the Master Reset (MR) pin asynchronously forces all Q outputs LOW.
The 100 Series contains temperature compensation.
Features
• 1000 MHz Min. Operating Frequency
• 800 ps Max. Clock to Output
• Single-Ended Outputs
• Asynchronous Master Resets
• Dual Clocks
• PECL Mode Operating Range: V_CC = 4.2 V to 5.7 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection:
♦ > 2 kV Human Body Model
♦ > 200 V Machine Model
♦ > 2 kV Charged Device Model
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
(For Additional Information, see Application Note AND8003/D)
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 323 Devices
• This Device is Pb-Free, Halogen Free and is RoHS Compliant
www.onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MC10E167FNG
AWLYYWW
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW = Work Week
G
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MC10E167FNR2G
Package
PLCC−8
(Pb-Free)
Shipping
37 Units/Tube
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 − Rev. 9
Publication Order Number:
MC10E167/D