MC10E131_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – 5V ECL 4-Bit D Flip-Flop

MC10E131, MC100E131
5V ECL 4-Bit D Flip-Flop
Description
The MC10E/100E131 is a quad master-slave D-type flip-flop with
differential outputs. Each flip-flop may be clocked separately by
holding Common Clock (C_C) LOW and using the Clock Enable (CE)
inputs for clocking. Common clocking is achieved by holding the CE
inputs LOW and using C_C to clock all four flip-flops. In this case, the
CE inputs perform the function of controlling the common clock, to
each flip-flop.
Individual asynchronous resets are provided (R). Asynchronous set
controls (S) are ganged together in pairs, with the pairing chosen to
reflect physical chip symmetry.
Data enters the master when both C_C and CE are LOW, and transfers
to the slave when either C_C or CE (or both) go HIGH.
The 100 Series contains temperature compensation.
Features
• 1100 MHz Min. Toggle Frequency
• Differential Outputs
• Individual and Common Clocks
• Individual Resets (asynchronous)
• Paired Sets (asynchronous)
• PECL Mode Operating Range: V_CC = 4.2 V to 5.7 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −4.2 V to −5.7 V
• Metastability Time Constant is 200 ps.
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
Pb = 1
Pb−Free = 3
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 240 devices
• Pb−Free Packages are Available*
http://onsemi.com
PLCC−28
FN SUFFIX
CASE 776
MARKING DIAGRAM*
1
MCxxxE131G
AWLYYWW
xxx = 10 or 100
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 11
Publication Order Number:
MC10E131/D