MC10E104 Datasheet, PDF (1/4 Pages) ON Semiconductor – QUINT 2-INPUT AND/NAND GATE

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quint 2ĆInput AND/NAND Gate
The MC10E/100E104 is a quint 2-input AND/NAND gate. The function
output F is the OR of all five AND gate outputs, while F is the NOR. The Q
outputs need not be terminated if only the F outputs are to be used.
• 600ps Max. Propagation Delay
• OR/NOR Function Outputs
• Extended 100E VEE Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View)
D3a D4b D4a NC VCCO F F
25 24 23 22 21 20 19
D3b 26
18 Q4
D2a 27
17 Q4
D2b 28
16 _VCC
VEE 1
15 _Q3
D1a 2
14 _Q3
D1b 3
13 _Q2
D0a 4
12 Q2
5 6 7 8 9 10 11
D0b VCCO Q0 Q0 Q1 Q1 VCCO
* All VCC and VCCO pins are tied together on the die.
PIN NAMES
Pin
D0a – D4b
Q0 – Q4
Q0 – Q4
F
F
Data Inputs
AND Outputs
NAND Outputs
OR Output
NOR Output
Function
FUNCTION OUTPUTS
F = (D0a • D0b) + (D1a • D1b) + (D2a • D2b) +
(D3a • D3b) + (D4a • D4b)
MC10E104
MC100E104
QUINT 2-INPUT
AND/NAND GATE
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
F
LOGIC DIAGRAM
F
D0a
Q0
D0b
Q0
D1a
Q1
D1b
Q1
D2a
Q2
D2b
Q2
D3a
Q3
D3b
Q3
D4a
Q4
D4b
Q4
12/93
© Motorola, Inc. 1996
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