MC10195_02 Datasheet, PDF (1/4 Pages) ON Semiconductor – Hex Inverter/Buffer

MC10195
Hex Inverter/Buffer
The MC10195 is a Hex Buffer Inverter which is built using six
EXCLUSIVE NOR gates. There is a common input to these gates
which when placed low or left open allows them to act as inverters.
With the common input connected to a high logic level the MC10195
is a hex buffer, useful for high fanout clock driving and reducing stub
lengths on long bus lines.
• P_D = 200 mW typ/pkg (No Load)
• t_pd = 2.8 ns typ (B–Q)
• t_pd = 3.8 ns typ (A–Q)
• t_r, t_f = 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
9A
5B
Q2
3
6
7
4
10
13
1
1
12
TRUTH TABLE
Inputs
Output
AB
Q
LL
H
LH
L
HL
L
HH
H
14
15
V_CC1 = PIN 1
V_CC2 = PIN 16
V_EE = PIN 8
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC10195L
AWLYYWW
1
16
MC10195P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10195
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
DIP PIN ASSIGNMENT
V_CC1
1
Q1
2
Q2
3
Q3
4
B1
5
B2
6
B3
7
V_EE
8
16
V_CC2
15
Q6
14
Q5
13
Q4
12
B6
11
B5
10
B4
9
A
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
ORDERING INFORMATION
Device
Package
Shipping
MC10195L
CDIP–16
25 Units / Rail
MC10195P
PDIP–16
25 Units / Rail
MC10195FN
PLCC–20
46 Units / Rail
1
Publication Order Number:
MC10195/D