MC10186_02 Datasheet, PDF (1/8 Pages) ON Semiconductor – Hex D Master-Slave Flip-Flop with Reset

MC10186
Hex D Master-Slave
Flip-Flop with Reset
The MC10186 contains six high–speed, master slave type “D”
flip–flops. Clocking is common to all six flip–flops. Data is entered
into the master when the clock is low. Master to slave data transfer
takes place on the positive–going Clock transition. Thus, outputs may
change only on a positive–going Clock transition. A change in the
information present at the data (D) input will not affect the output
information any other time due to the master–slave construction of this
device. A COMMON RESET IS INCLUDED IN THIS CIRCUIT.
RESET ONLY FUNCTIONS WHEN CLOCK IS LOW.
• P_D = 460 mW typ/pkg (No Load)
• f_toggle = 150 MHz (typ)
• t_r, t_f = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
D0 5
2 Q0
D1 6
3 Q1
D2 7
4 Q2
D3 10
13 Q3
D4 11
14 Q4
D5 12
CLOCK 9
RESET 1
15 Q5
V_CC = PIN 16
V_EE = PIN 8
CLOCKED TRUTH TABLE
RCD
Qn + 1
LLX
Q_n
L H* L
L
L H* H
H
HLX
L
*A clock H is a clock transition
from a low to a high state.
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC10186L
AWLYYWW
1
16
MC10186P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10186
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
DIP PIN ASSIGNMENT
RESET
1
Q0
2
Q1
3
Q2
4
D0
5
D1
6
D2
7
V_EE
8
16
V_CC
15
Q5
14
Q4
13
Q3
12
D5
11
D4
10
D3
9
CLOCK
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
ORDERING INFORMATION
Device
Package
Shipping
MC10186L
CDIP–16
25 Units / Rail
MC10186P
PDIP–16
25 Units / Rail
MC10186FN
PLCC–20
46 Units / Rail
Publication Order Number:
MC10186/D