MC10173_02 Datasheet, PDF (1/8 Pages) ON Semiconductor – Quad 2-Input Multiplexer/ Latch

MC10173
Quad 2-Input Multiplexer/
Latch
The MC10173 is a quad two channel multiplexer with latch. It
incorporates common clock and common data select inputs. The select
input determines which data input is enabled. A high (H) level enables
data inputs D00, D10, D20, and D30 and a low (L) level enables data
inputs D01, D11, D21, D31. Any change on the data input will be
reflected at the outputs while the clock is low. The outputs are latched
on the positive transition of the clock. While the clock is in the high
state, a change in the information present at the data inputs will not
affect the output information.
• P_D = 275 mW typ/pkg (No Load)
• t_pd = 2.5 ns typ
• t_r, t_f = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
SELECT 9
1 Q0
D00 6
D01 5
D10 4
D11 3
2 Q1
D20 13
D21 12
15 Q2
D30 11
14 Q3
D31 10
CLOCK 7
TRUTH TABLE
SELECT CLOCK Q0_n+1
H
L
D00
L
L
D01
X
H
Q0_n
V_CC = PIN 16
V_EE = PIN 8
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC10173L
AWLYYWW
1
16
MC10173P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10173
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
DIP PIN ASSIGNMENT
Q0
1
Q1
2
D11
3
D10
4
D01
5
D00
6
CLOCK
7
V_EE
8
16
V_CC
15
Q2
14
Q3
13
D20
12
D21
11
D30
10
D31
9
SELECT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
ORDERING INFORMATION
Device
MC10173L
Package
CDIP–16
Shipping
25 Units / Rail
MC10173P
PDIP–16
25 Units / Rail
MC10173FN
PLCC–20
46 Units / Rail
Publication Order Number:
MC10173/D