MC10173 Datasheet, PDF (1/5 Pages) ON Semiconductor – Quad 2-Input Multiplexer/Latch

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input Multiplexer/
Latch
The MC10173 is a quad two channel multiplexer with latch. It incorporates
common clock and common data select inputs. The select input determines
which data input is enabled. A high (H) level enables data inputs D00, D10,
D20, and D30 and a low (L) level enables data inputs D01, D11, D21, D31. Any
change on the data input will be reflected at the outputs while the clock is low.
The outputs are latched on the positive transition of the clock. While the clock is
in the high state, a change in the information present at the data inputs will not
affect the output information.
PD = 275 mW typ/pkg (No Load)
tpd = 2.5 ns typ
tr, tf = 2.0 ns typ (20%–80%)
SELECT 9
LOGIC DIAGRAM
D00 6
1 Q0
D01 5
D10 4
D11 3
2 Q1
D20 13
D21 12
D30 11
D31 10
CLOCK 7
15 Q2
14 Q3
VCC = PIN 16
VEE = PIN 8
MC10173
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
Q0
1
Q1
2
D11
3
D10
4
D01
5
D00
6
CLOCK
7
VEE
8
16
VCC
15
Q2
14
Q3
13
D20
12
D21
11
D30
10
D31
9
SELECT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
TRUTH TABLE
SELECT CLOCK Q0n+1
H
L
D00
L
L
D01
X
H
Q0n
3/93
© Motorola, Inc. 1996
3–117
REV 5