MC10161_02 Datasheet, PDF (1/8 Pages) ON Semiconductor – Binary to 1-8 Decoder (Low)

MC10161
Binary to 1-8 Decoder
(Low)
The MC10161 is designed to decode a three bit input word to a one
of eight line output. The selected output will be low while all other
outputs will be high. The enable inputs, when either or both are high,
force all outputs high.
The MC10161 is a true parallel decoder. No series gating is used
internally, eliminating unequal delay times found in other decoders.
This design provides the identical 4 ns delay from any address or enable
input to any output.
A complete mux/demux operation on 16 bits for data distribution is
illustrated in Figure 1. This system, using the MC10136 control
counters, has the capability of incrementing, decrementing or holding
data channels. When both S0 and S1 are low, the index counters reset,
thus initializing both the mux and demux units. The four binary
outputs of the counter are buffered by the MC10161s to send
twisted–pair select data to the multiplexer/demultiplexer to units.
• P_D = 315 mW typ/pkg (No Load)
• t_pd = 4.0 ns typ
• t_r, t_f = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
E0Ą2
E1Ą15
6ĄQ0
5ĄQ1
4ĄQ2
AĄ7
3ĄQ3
13ĄQ4
BĄ9
12ĄQ5
11ĄQ6
CĄ14
V_CC1 = PIN 1
V_CC2 = PIN 16
V_EE = PIN 8
10ĄQ7
ENABLE
INPUTS
INPUTS
TRUTH TABLE
OUTPUTS
E1 E0 C B A Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L L LLL L H H H H H H H
L L LLHH L H H H H H H
L L LHL H H L H H H H H
L L LHH H H H L H H H H
L L HL L H H H H L H H H
L L HLHH H H H H L H H
L L HH L H H H H H H L H
L L HHH H H H H H H H L
H X XXX H H H H H H H H
X H XXX H H H H H H H H
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
MARKING
DIAGRAMS
16
MC10161L
AWLYYWW
1
16
MC10161P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10161
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
DIP PIN ASSIGNMENT
V_CC1
1
E0
2
Q3
3
Q2
4
Q1
5
Q0
6
A
7
V_EE
8
16
V_CC2
15
E1
14
C
13
Q4
12
Q5
11
Q6
10
Q7
9
B
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
ORDERING INFORMATION
Device
Package
Shipping
MC10161L
CDIP–16
25 Units / Rail
MC10161P
PDIP–16
25 Units / Rail
MC10161FN
PLCC–20
46 Units / Rail
Publication Order Number:
MC10161/D