MC10141 Datasheet, PDF (1/6 Pages) ON Semiconductor – Four Bit Universal Shift Register

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Four Bit Universal Shift
Register
The MC10141 is a four–bit universal shift register which performs shift left, or
shift right, serial/parallel in, and serial/parallel out operations with no external
gating. Inputs S1 and S2 control the four possible operations of the register
without external gating of the clock. The flip–flops shift information on the
positive edge of the clock. The four operations are stop shift, shift left, shift right,
and parallel entry of data. The other six inputs are all data type inputs; four for
parallel entry data, and one for shifting in from the left (DL) and one for shifting
in from the right (DR).
PD = 425 mW typ/pkg (No Load)
fShift = 200 MHz typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
D3
D2
Parallel Enter
S1 _{1 of 4}
S2 ^Decoder _{Shift Right}
DR
Shift Left
Hold
D1
D0
DL
DQ
DQ
DQ
DQ
C
C
C
C
C
Q3
Q2
Q1
Q0
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
TRUTH TABLE
SELECT
OUTPUTS
S1 S2
LL
OPERATING MODE
Parallel Entry
Q0n+1 Q1n+1 Q2n+1
D0
D1
D2
LH
Shift Right*
Q1n
Q2n
HL
Shift Left*
DL
Q0n
HH
Stop Shift
Q0n
Q1n
*Outputs as exist after pulse appears at “C” input with input conditions as
shown. (Pulse = Positive transition of clock input).
Q3n
Q1n
Q2n
Q3n+1
D3
DR
Q2n
Q3n
MC10141
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC1
1
Q2
2
Q3
3
C
4
DR
5
D3
6
S2
7
VEE
8
16
VCC2
15
Q1
14
Q0
13
DL
12
D0
11
D1
10
S1
9
D2
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3–46
REV 5