MC10121 Datasheet, PDF (1/5 Pages) ON Semiconductor – 4-Wide OR-AND/OR-AND Gate

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4-Wide OR-AND/OR-AND
Gate
The MC10121 is a basic logic building block providing the simultaneous
OR–AND/OR–AND–Invert function, useful in data control and digital multiplexing
applications.
PD = 100 mW typ/pkg (No Load)
tpd = 2.3 ns typ
tr, tf = 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
4
5
6
7
9
10
2
3
11
12
13
14
15
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
MC10121
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
A1IN
4
A1IN
5
A1IN
6
A2IN
7
VEE
8
16
VCC2
15
A4IN
14
A4IN
13
A4IN
12
A3IN
11
A3IN
10
A2IN, A3IN
9
A2IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3–73
REV 5