MC10114_02 Datasheet, PDF (1/8 Pages) ON Semiconductor – Triple Line Receiver

MC10114
Triple Line Receiver
The MC10114 is a triple line receiver designed for use in sensing
differential signals over long lines. An active current source and
translated emitter follower inputs provide the line receiver with a
common mode noise rejection limit of one volt in either the positive or
the negative direction. This allows a large amount of common mode
noise immunity for extra long lines.
Another feature of the MC10114 is that the OR outputs go to a logic
low level whenever the inputs are left floating. The outputs are each
capable of driving 50 ohm transmission lines.
This device is useful in high speed central processors,
minicomputers, peripheral controllers, digital communication
systems, testing and instrumen– tation systems. The MC10114 can
also be used for MOS to MECL interfacing and it is ideal as a sense
amplifier for MOS RAM’s.
A V_BB reference is provided which is useful in making the
MC10114 a Schmit trigger, allowing single–ended driving of the
inputs, or other applications where a stable reference voltage is
necessary. See MECL Design Handbook (HB205) pages 226 and 228.
• P_D = 145 mW typ/pkg
• t_pd = 2.4 ns typ (Single Ended Input)
• t_pd = 2.0 ns typ (Differential Input)
• t_r, t_f = 2.1 ns typ (20%–80%)
LOGIC DIAGRAM
4
2
5
3
9
6
10
7
12
14 V_CC1 = PIN 1
13
15 ^VCC2 ^{= PIN 16}
11
V_EE = PIN 8
V_BB*
*V_BB to be used to supply bias to the MC10114 only and bypassed (when used) with
0.01 µF to 0.1 µF capacitor to ground (0 V). V_BB can source < 1.0 mA.
When the input pin with the bubble goes positive, its respective output pin with
bubble goes positive.
DIP PIN ASSIGNMENT
V_CC1
1
A_OUT
2
A_OUT
3
A_IN
4
A_IN
5
B_OUT
6
B_OUT
7
V_EE
8
16
V_CC2
15
C_OUT
14
C_OUT
13
C_IN
12
C_IN
11
V_BB
10
B_IN
9
B_IN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10114L
AWLYYWW
1
16
MC10114P
AWLYYWW
1
1
10114
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10114L
CDIP–16
25 Units / Rail
MC10114P
PDIP–16
25 Units / Rail
MC10114FN
PLCC–20
46 Units / Rail
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10114/D