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MC10109_02 Datasheet, PDF (1/8 Pages) ON Semiconductor – Dual 4-5-Input OR/NOR Gate
MC10109
Dual 4-5-Input OR/NOR
Gate
The MC10109 is a dual 4–5 input OR/NOR gate.
• PD = 30 mW typ/gate (No Load)
• tpd = 2.0 ns typ
• tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
ă4
ă5
3
ă6
2
ă7
ă9
10
11
14
12
15
13
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
AIN
4
AIN
5
AIN
6
AIN
7
VEE
8
16
VCC2
15
BOUT
14
BOUT
13
BIN
12
BIN
11
BIN
10
BIN
9
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10109L
AWLYYWW
1
16
MC10109P
AWLYYWW
1
1
10109
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10109L
CDIP–16
25 Units / Rail
MC10109P
PDIP–16
25 Units / Rail
MC10109FN
PLCC–20
46 Units / Rail
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10109/D