MC10105 Datasheet, PDF (1/5 Pages) ON Semiconductor – Triple 2-3-2-Input OR/NOR Gate

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple 2-3-2-Input OR/NOR
Gate
The MC10105 is a triple 2–3–2 input OR/NOR gate.
PD = 30 mW typ/gate (No Load)
tpd = 2.0 ns typ
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
4
3
5
2
9
6
10
11
7
13
14
12
15
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
MC10105
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
AIN
4
AIN
5
BOUT
6
BOUT
7
VEE
8
16
VCC2
15
COUT
14
COUT
13
CIN
12
CIN
11
BIN
10
BIN
9
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
3/93
© Motorola, Inc. 1996
3–21
REV 5