MC100LVEL92_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – 5V Triple PECL Input to LVPECL Output Translator

MC100LVEL92
5V Triple PECL Input to
LVPECL Output Translator
Description
The MC100LVEL92 is a triple PECL input to LVPECL output
translator. The device receives standard PECL signals and translates
them to differential LVPECL output signals.
To accomplish the PECL to LVPECL level translation, the
MC100LVEL92 requires three power rails. The V_CC supply is to be
connected to the standard 5 V PECL supply, the LV_CC supply is to be
connected to the 3.3 V LVPECL supply, and Ground is connected to
the system ground plane. Both the V_CC and LV_CC should be bypassed
to ground with 0.01 mf capacitors.
The PECL V_BB pin, an internally generated voltage supply, is
available to this device only. For single-ended input conditions, the
unused differential input is connected to V_BB as a switching reference
voltage. V_BB may also rebias AC coupled inputs. When used,
decouple V_BB and V_CC via a 0.01 mF capacitor and limit current
sourcing or sinking to 0.5 mA. When not used, V_BB should be
left open.
Features
• 500 ps Propagation Delays
• 5 V and 3.3 V Supplies Required
• ESD Protection: Human Body Model; >2 kV,
Machine Model; >200 V
• The 100 Series Contains Temperature Compensation
• LVPECL Operating Range: LV_CC = 3.0 V to 3.8 V
• PECL Operating Range: V_CC = 4.5 V to 5.5 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or < GND + 1.3 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index 28 to 34
• Transistor Count = 247 devices
• Pb−Free Packages are Available*
http://onsemi.com
SO−20 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100LVEL92
AWLYYWWG
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 11
Publication Order Number:
MC100LVEL92/D