MC100LVEL90_16 Datasheet, PDF (1/5 Pages) ON Semiconductor – -3.3V / -5V Triple ECL Input to LVPECL Output Translator

MC100LVEL90
-3.3 V / -5 V Triple ECL Input
to LVPECL Output Translator
Description
The MC100LVEL90 is a triple ECL to LVPECL translator. The device
receives either −3.3 V or −5 V differential ECL signals, determined by the
V_EE supply level, and translates them to +3.3 V differential LVPECL
output signals.
To accomplish the level translation, the LVEL90 requires three power
rails. The V_CC supply should be connected to the positive supply, and the
V_EE pin should be connected to the negative power supply. The GND
pins, as expected, are connected to the system ground plane. Both V_EE
and V_CC should be bypassed to ground via 0.01 mF capacitors.
Under open input conditions, the D input will be biased at V_EE/2 and
the D input will be pulled to V_EE. This condition will force the Q output
to a LOW, ensuring stability.
The V_BB pin, an internally generated voltage supply, is available to this
device only. For single-ended input conditions, the unused differential
input is connected to V_BB as a switching reference voltage. V_BB may also
rebias AC coupled inputs. When used, decouple V_BB and V_CC via a
0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When
not used, V_BB should be left open.
Features
• 500 ps Propagation Delays
• ESD Protection: > 2 kV HBM, > 200 V MM
• The 100 Series Contains Temperature Compensation
• Operating Range: V_CC = 3.0 V to 3.8 V;
V_EE = −3.0V to −5.5 V; GND = 0 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or at V_EE
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 261 devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
SOIC−20 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100LVEL90
AWLYYWWG
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping^†
MC100LVEL90DWG SOIC−20 WB 38 Units/Tube
(Pb-Free)
MC100LVEL90DWR2G SOIC−20 WB 1000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 − Rev. 12
Publication Order Number:
MC100LVEL90/D