MC100LVEL59 Datasheet, PDF (1/3 Pages) ON Semiconductor – Triple 2:1 Multiplexer

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple 2:1 Multiplexer
The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs.
The MC100EL59 is pin and functionally equivalent to the MC100LVEL59
but is specified for operation at the standard 100E ECL voltage supply.
The output data of the muxes can be controlled individually via the select
inputs or as a group via the common select input. The flexibile selection
scheme makes the device useful for both data path and random logic
applications.
• Individual or Common Select Controls
• 20–Lead SOIC Packaging
• 500ps Typical Propagation Delays
• Supports Both Standard and Low Voltage 100K ECL
• Internal Input Pulldown Resistors
• >2000V ESD Protection
MC100LVEL59
MC100EL59
20
1
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
Logic Diagram and Pinout: 20–Lead SOIC (Top View)
VCC Q0
20 19
Q0 VCC Q1
18 17 16
Q1 VCC Q2
15 14 13
Q2 VEE
12 11
1
0
1
0
1
0
12345678
COM_SEL D0a D0b SEL0 D1a D1b SEL1 D2a
9 10
D2b SEL2
TRUTH TABLE
SEL
H
L
Data
a
b
PIN NAMES
Pins
D0a–D1a
D0b–D1b
SEL0–SEL1
COM_SEL
Q0–Q2
Q0–Q2
Function
Input Data a
Input Data b
Individual Select Input
Common Select Input
True Outputs
Inverted Outputs
4/95
© Motorola, Inc. 1996
4–1
REV 1