MC100LVEL56 Datasheet, PDF (1/4 Pages) ON Semiconductor – Dual Differential 2:1 Multiplexer

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Differential
2:1 Multiplexer
The MC100LVEL56 is a dual, fully differential 2:1 multiplexer. The
MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but
is specified for operation at the standard 100E ECL voltage supply. The
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals (for more information on AC coupling ECL
signals refer to the interfacing section of the ECLinPS data book
DL140/D).
The device features both individual and common select inputs to
address both data path and random logic applications.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs are left
open the D input will pull down to VEE, The D input will bias around VCC/2
forcing the Q output LOW.
• Differential Inputs and Outputs
• 20–Lead SOIC Packaging
• 440ps Typical Propagation Delays
• Separate and Common Select
• Supports Both Standard and Low Voltage 100K ECL
• Internal Input Pulldowns
• >2000V ESD Protection
Logic Diagram and Pinout: 20-Lead SOIC (Top View)
VCC Q0
20 19
Q0 SEL0
SEL1 VCC Q1
18 17 16 15 14 13
Q1 VEE
12 11
MC100LVEL56
MC100EL56
20
1
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
TRUTH TABLE
SEL
H
L
Data
a
b
PIN NAMES
Pins
D0a–D1a
D0b–D1b
SEL0–SEL1
COM_SEL
Q0–Q1
Q0–Q1
Function
Input Data a
Input Data b
Individual Select Input
Common Select Input
True Outputs
Inverted Outputs
1 2 3 4 5 6 7 8 9 10
D0a D0a VBB0 D0b D0b D1a D1a VBB1 D1b D1b
4/95
© Motorola, Inc. 1996
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