MC100LVEL32_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V ECL ÷2 Divider

MC100LVEL32
3.3V ECL ÷2 Divider
Description
The MC100LVEL32 is an integrated ÷2 divider. The LVEL32 is
functionally identical to the EL32, but operates from a 3.3 V supply.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flop will attain a random state; the
reset allows for the synchronization of multiple LVEL32’s in a system.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
Features
• 510 ps Propagation Delay
• 2.6 GHz Typical Maximum Frequency
• ESD Protection: Human Body Model; >4 kV,
Machine Model; >200 V
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range:
V_CC = 3.0 V to 3.8 V with V_EE = 0 V
• NECL Mode Operating Range:
V_CC = 0 V with V_EE = −3.0 V to −3.8 V
• Internal Input Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 111 devices
• Pb−Free Packages are Available
http://onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
8
1
TSSOP−8
DT SUFFIX
CASE 948R
MARKING
DIAGRAMS*
8
KVL32
ALYW
G
1
8
KV32
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 9
Publication Order Number:
MC100LVEL32/D