MC100LVEL32 Datasheet, PDF (1/4 Pages) ON Semiconductor – ÷2 Divider

MC100LVEL32
÷2 Divider
The MC100LVEL32 is an integrated ÷2 divider. The differential
clock inputs and the VBB allow a differential, single-ended or AC
coupled interface to the device. If used, the VBB output should be
bypassed to ground with a 0.01µF capacitor. Also note that the VBB is
designed to be used as an input bias on the LVEL32 only, the VBB
output has limited current sink and source capability.The LVEL32 is
functionally identical to the EL32, but operates from a low voltage
supply.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flop will attain a random state; the
reset allows for the synchronization of multiple EL32’s in a system.
• 510ps Propagation Delay
• 3.0GHz Toggle Frequency
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• >1000V ESD Protection
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
Reset 1
CLK 2
CLK 3
8 VCC
R
7Q
÷2
6Q
http://onsemi.com
8
1
SO–8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
KVL32
ALYW
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional information, see Application Note
AND8002/D
PIN DESCRIPTION
PIN
CLK
Reset
VBB
Q
FUNCTION
Clock Inputs
Asynch Reset
Ref Voltage Output
Data Ouputs
VBB 4
5 VEE
ORDERING INFORMATION
Device
Package
Shipping
MC100LVEL32D
SO–8
98 Units/Rail
MC100LVEL32DR2 SO–8 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2000
1
April, 2000 – Rev. 1
Publication Order Number:
MC100LVEL32/D