MC100LVEL30 Datasheet, PDF (1/3 Pages) ON Semiconductor – Triple D Flip-Flop With Set and Reset

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple D Flip-Flop
With Set and Reset
MC100LVEL30
MC100EL30
The MC100LVEL30 is a triple master–slave D flip flop with differential
outputs. The MC100EL30 is pin and functionally equivalent to the
MC100LVEL30 but is specified for operation at the standard 100E ECL
voltage supply. Data enters the master latch when the clock input is LOW
and transfers to the slave upon a positive transition on the clock input.
In addition to a common Set input individual Reset inputs are provided
for each flip flop. Both the Set and Reset inputs function asynchronous
and overriding with respect to the clock inputs.
• 1200MHz Minimum Toggle Frequency
• 20–Lead SOIC Packaging
• 550ps Typical Propagation Delays
• Set and Reset Inputs
• Supports both Standard and Low Voltage 100K ECL
• Internal Input Pulldown Resistors
• >2000V ESD Protection
Logic Diagram and Pinout: 20-Lead SOIC (Top View)
VCC Q0
20 19
Q0 VCC Q1
18 17 16
Q1 VCC Q2
15 14 13
Q2 VEE
12 11
QQ
S
R
D
QQ
S
R
D
QQ
S
R
D
1 2 3 4 5 6 7 8 9 10
S012 D0 CLK0 R0 D1 CLK1 R1 D2 CLK2 R2
20
1
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
TRUTH TABLE
R S D CLK Q
Q
LLL
L LH
HLX
LHX
HHX
Z
L
H
Z
H
L
X
L
H
X
H
L
X Undef Undef
Z = LOW to HIGH Transition
PIN NAMES
Pins
D0–D2
R0–R2
CLK0–CLK2
S012
Function
Data Inputs
Reset Inputs
Clock Inputs
Common Set Input
5/96
© Motorola, Inc. 1996
4–1
REV 2