MC100LVEL13_16 Datasheet, PDF (1/6 Pages) ON Semiconductor – ECL Dual 1:3 Fanout Buffer

MC100LVEL13
3.3 V ECL Dual 1:3 Fanout
Buffer
Description
The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer.
The Low Output-Output Skew of the device makes it ideal for
distributing two different frequency synchronous signals.
The differential inputs have special circuitry which ensures device
stability under open input conditions. When both differential inputs
are left open the D input will pull down to V_EE, The D input will bias
around V_CC/2 and the Q output will go LOW.
Features
• 500 ps Typical Propagation Delays
• 50 ps Output-Output Skews
• ESD Protection: > 2 kV Human Body Model
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range: V_CC = 3.0 V to 3.8 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = −3.0 V to −3.8 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or at V_EE
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 143 Devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
SOIC−20 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100LVEL13
AWLYYWWG
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping†
MC100LVEL13DWG
SOIC−20 WB 38 Units / Tube
(Pb-Free)
MC100LVEL13DWR2G SOIC−20 WB
(Pb-Free)
1000
Tape & Reel
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
July, 2016 − Rev. 7
Publication Order Number:
MC100LVEL13/D