MC100LVEL05 Datasheet, PDF (1/3 Pages) ON Semiconductor – 2-Input Differential AND/NAND

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
2ĆInput Differential AND/NAND
The MC100LVEL05 is a 2-input differential AND/NAND gate. The
device is functionally equivalent to the MC100EL05 device and operates
from a 3.3V supply voltage. With propagation delays and output transition
times equivalent to the EL05, the LVEL05 is ideally suited for those
applications which require the ultimate in AC performance at low voltage
power supplies.
Because a negative 2-input NAND is equivalent to a 2-input OR
function, the differential inputs and outputs of the device allows the
LVEL05 to also be used as a 2-input differential OR/NOR gate.
• 340ps Propagation Delay
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• >2000V ESD Protection
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
D0 1
D0 2
8 VCC
7Q
D1 3
D1 4
6Q
5 VEE
MC100LVEL05
D SUFFIX
8–LEAD PLASTIC SOIC PACKAGE
CASE 751-05
PIN DESCRIPTION
PIN
D0, D1
Q
FUNCTION
Data Inputs
Data Outputs
1/97
© Motorola, Inc. 1997
3–1
REV 0