MC100LVE222 Datasheet, PDF (1/8 Pages) ON Semiconductor – Low Voltage 1:15 Differential ÷1÷2 ECL/PECL Clock Driver

MC100LVE222
Low Voltage 1:15
÷ ÷ Differential 1/ 2 ECL/PECL
Clock Driver
The MC100LVE222 is a low skew 1:15 differential ÷1/÷2 ECL
fanout buffer designed with clock distribution in mind. The
LVECL/LVPECL input signal pairs can be differential or used
single–ended (with VBB output reference bypassed and connected to
the unused input of a pair). Either of two fully differential clock inputs
may be selected. Each of the four output banks of 2, 3, 4, and 6
differential pairs may be independently configured to fanout 1X or
1/2X of the input frequency. The LVE222 specifically guarantees low
output to output skew. Optimal design, layout, and processing
minimize skew within a device and from lot to lot.
The fsel pins and CLK_Sel pin are asynchronous control inputs.
Any changes may cause indeterminate output states requiring a MR
pulse to resynchronize any 1/2X outputs.
To ensure that the tight skew specification is realized, both sides of
any differential output pair need to be terminated identically even if
only one side is being used. When fewer than all fifteen pairs are used,
identically terminate all the output pairs on the same package side
whether used or unused. If no outputs on a side are used, then leave all
these outputs open (unterminated). This will maintain minimum
output skew. Failure to do this will result in a 10–20ps loss of skew
margin (propagation delay) in the output(s) in use.
The MC100LVE222, as with most ECL devices, can be operated
from a positive VCC supply in PECL mode. This allows the LVE222 to
be used for high performance clock distribution in +3.3V systems.
Designers can take advantage of the LVE222’s performance to
distribute low skew clocks across the backplane or the board. In a
PECL environment series or Thevenin line, terminations are typically
used as they require no additional power supplies. All power supply
pins must be connected. For more information on using PECL,
designers should refer to Application Note AN1406/D. For a SPICE
model, see Application Note AN1560/D.
• 200ps Part–to–Part Skew
• 50ps Output–to–Output Skew
• Selectable 1x or 1/2x Frequency Outputs
• Extended Power Supply Range of –3.0V to –5.25V (+3.0V to
+5.25V)
• 52–Lead TQFP Packaging
• ESD > 2000V
• Moisture Sensitivity Level 2,
For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
• Transistor Count = 684 devices
http://onsemi.com
TQFP
FA SUFFIX
CASE 848D
MARKING DIAGRAM*
MC100LVE
222
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
32
1
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
Device
Package
Shipping
MC100LVE222FA
TQFP 800 Units/Tray
MC100LVE222FAR2 TQFP 1500 Tape & Reel
© Semiconductor Components Industries, LLC, 1999
1
February, 2000 – Rev. 2
Publication Order Number:
MC100LVE222/D