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MC100EPT622_11 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V LVTTL/LVCMOS to LVPECL Translator | |||
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MC100EPT622
3.3VâLVTTL/LVCMOS to
LVPECL Translator
Description
The MC100EPT622 is a 10âBit LVTTL/LVCMOS to LVPECL
translator. Because LVPECL (Positive ECL) levels are used only +3.3 V
and ground are required. The device has an ORâed enable input which
can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs
(ENTTL). If the inputs are left open, they will default to the enable state.
The device design has been optimized for low channelâtoâchannel skew.
Features
⢠450 ps Typical Propagation Delay
⢠Maximum Frequency > 1.5 GHz Typical
⢠PECL Mode
⢠Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V
⢠PNP LVTTL Inputs for Minimal Loading
⢠Q Output Will Default HIGH with Inputs Open
⢠The 100 Series Contains Temperature Compensation
⢠PbâFree Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS*
LQFPâ32
FA SUFFIX
CASE 873A
1 32
QFN32
MN SUFFIX
CASE 488AM
MC100
EPT622
AWLYYWWG
32
1
1
MC100
EPT622
AWLYYWWG
G
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G or G = PbâFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
Table 1. TRUTH TABLE
ENPECL ENTTL
D
Q
H
X
H
H
H
X
L
L
X
H
H
H
X
H
L
L
L
L
X
L
*For additional information on our PbâFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2011
1
May, 2011 â Rev. 6
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
MC100EPT622/D
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