MC100EPT22_16 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator

MC100EPT22
3.3 V Dual LVTTL/LVCMOS
to Differential LVPECL
Translator
Description
The MC100EPT22 is a dual LVTTL/LVCMOS to differential
LVPECL translator. Because LVPECL (Positive ECL) levels are used
only +3.3 V and ground are required. The small outline 8−lead
package and the single gate of the EPT22 makes it ideal for those
applications where space, performance, and low power are at a
premium. Because the mature MOSAIC 5 process is used, low cost
and high speed can be added to the list of features.
Features
• 420 ps Typical Propagation Delay
• Maximum Frequency = > 1.1 GHz Typical
• Operating Range: V_CC = 3.0 V to 3.6 V with GND = 0 V
• PNP LVTTL Inputs for Minimal Loading
• Q Output Will Default HIGH with Inputs Open
• The 100 Series Contains Temperature Compensation.
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
8
1
8
1
SOIC−8 NB
TSSOP−8
DFN8
D SUFFIX
DT SUFFIX MN SUFFIX
CASE 751−07 CASE 948R−02 CASE 506AA
MARKING DIAGRAMS*
8
KPT22
ALYW
G
1
SOIC−8 NB
8
KA22
ALYWG
G
1
TSSOP−8
14
DFN8
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
M
= Date Code
G
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping†
MC100EPT22DG
SOIC−8 NB
(Pb-Free)
98 Units/Tube
MC100EPT22DR2G
SOIC−8 NB 2500 Tape & Reel
(Pb-Free)
MC100EPT22DTG
TSSOP−8
(Pb-Free)
100 Tape & Reel
MC100RPT22DTR2G TSSOP−8
(Pb-Free)
2500 Tape & Reel
MC100EPT22MNR4G DFN8
(Pb-Free)
1000 Tape & Reel
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
August, 2016 − Rev. 14
Publication Order Number:
MC100EPT22/D