MC100EPT22_06 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL

MC100EPT22
3.3V Dual LVTTL/LVCMOS
to Differential LVPECL
Translator
Description
The MC100EPT22 is a dual LVTTL/LVCMOS to differential
LVPECL translator. Because LVPECL (Positive ECL) levels are used
only +3.3 V and ground are required. The small outline 8−lead
package and the single gate of the EPT22 makes it ideal for those
applications where space, performance, and low power are at a
premium. Because the mature MOSAIC 5 process is used, low cost
and high speed can be added to the list of features.
Features
• 420 ps Typical Propagation Delay
• Maximum Frequency > 1.1 GHz Typical
• Operating Range: V_CC = 3.0 V to 3.6 V with GND = 0 V
• PNP LVTTL Inputs for Minimal Loading
• Q Output Will Default HIGH with Inputs Open
• The 100 Series Contains Temperature Compensation.
• Pb−Free Packages are Available
http://onsemi.com
8
1
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS*
8
KPT22
ALYW
G
1
TSSOP−8
DT SUFFIX
CASE 948R
8
KA22
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
1
December, 2006 − Rev. 11
Publication Order Number:
MC100EPT22/D