MC100EPT20 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V LVTTL/LVCMOS to Differential LVPECL Translator

MC10EPT20, MC100EPT20
3.3V LVTTL/LVCMOS to
Differential LVPECL
Translator
The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL
translator. Because PECL (Positive ECL) levels are used, only +3.3 V
and ground are required. The small outline SOIC−8 package and the
single gate of the EPT20 makes it ideal for those applications where
space, performance, and low power are at a premium.
The 100 Series contains temperature compensation.
• 390 ps Typical Propagation Delay
• Maximum Input Clock Frequency > 1 GHz Typical
• Operating Range V_CC = 3.0 V to 3.6 V
with GND = 0 V
• PNP TTL Input for Minimal Loading
• Q Output will Default HIGH with Input Open
• Pb−Free Packages are Available
http://onsemi.com
8
1
SO−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HPT20
ALYW
1
8
KPT20
ALYW
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HA20
ALYW
1
8
KA20
ALYW
1
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
1
September, 2004 − Rev. 7
Publication Order Number:
MC10EPT20/D