MC100EP33 Datasheet, PDF (1/12 Pages) ON Semiconductor – 3.3V 5VECL / 4 Divider

MC10EP33, MC100EP33
3.3V / 5VĄECL B4 Divider
The MC10/100EP33 is an integrated B4 divider. The differential
clock inputs.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
The reset pin is asynchronous and is asserted on the rising edge.
Upon power–up, the internal flip–flops will attain a random state; the
reset allows for the synchronization of multiple EP33’s in a system.
The 100 Series contains temperature compensation.
• 320 ps Propagation Delay
• Maximum Frequency > 4 GHz Typical
• PECL Mode Operating Range: V_CC = 3.0 V to 5.5 V
with V_EE = 0 V
• NECL Mode Operating Range: V_CC = 0 V
with V_EE = –3.0 V to –5.5 V
• Open Input Default State
• Safety Clamp on Inputs
• Q Output Will Default LOW with Inputs Open or at V_EE
• V_BB Output
http://onsemi.com
MARKING DIAGRAMS*
8
1
SO–8
D SUFFIX
CASE 751
8
HEP33
ALYW
1
8
KEP33
ALYW
1
8
1
TSSOP–8
DT SUFFIX
CASE 948R
8
HP33
ALYW
1
8
KP33
ALYW
1
H = MC10
K = MC100
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
Device
MC10EP33D
Package
SO–8
Shipping
98 Units/Rail
MC10EP33DR2
SO–8 2500 Tape & Reel
MC100EP33D
SO–8
98 Units/Rail
MC100EP33DR2 SO–8 2500 Tape & Reel
MC10EP33DT
TSSOP–8 100 Units/Rail
MC10EP33DTR2 TSSOP–8 2500 Tape & Reel
MC100EP33DT TSSOP–8 100 Units/Rail
MC100EP33DTR2 TSSOP–8 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2002
1
September, 2002 – Rev. 5
Publication Order Number:
MC10EP33/D