MC100EP16VT_16 Datasheet, PDF (1/12 Pages) ON Semiconductor – 3.3V / 5V ECL Differential Receiver/Driver

MC100EP16VT
3.3 V / 5 V ECL Differential
Receiver/Driver with
Variable Output Swing and
Internal Input Termination
Description
The MC100EP16VT is a differential receiver functionally equivalent
to the 100EP16 with input pins controlling the amplitude of the outputs
(pin 1) and providing an internal termination network (pin 4).
The V_CTRL input pin controls the output amplitude of the EP16VT
and is referenced to V_CC. (See Figure 4.) The operational range of the
V_CTRL input is from ≤ V_BB (a supply at V_CC−1.42 V, maximum output
amplitude) to V_CC (minimum output amplitude). V_BB is an externally
supplied voltage equal to V_CC−1.42 V (See Figures 2 and Figure 3). A
variable resistor between V_CC and V_BB, with the wiper driving
V_CTRL, can control the output amplitude. Typical application circuits
and a V_CTRL Voltage vs. Output Amplitude graph are described in this
data sheet. When left open, the V_CTRL pin will be internally pulled
down to V_EE and operate as a standard EP16, with 100% output
amplitude.
The V_TT input pin offers an internal termination network for a 50 W
line impedance environment, shown in Figure 1. For further reference,
see Application Note AND8020, Termination of ECL Logic Devices.
Input considerations are required for D and D under no signal conditions
to prevent instability.
Special considerations are required for differential inputs under No
Signal conditions to prevent instability.
Features
• 220 ps Propagation Delay
• Maximum Frequency > 4 GHz Typical (See Graph)
• The 100 Series Contains Temperature Compensation
• PECL Mode Operating Range:
♦ V_CC = 3.0 V to 5.5 V with V_EE = 0 V
• NECL Mode Operating Range:
♦ V_CC = 0 V with V_EE = −3.0 V to −5.5 V
• Open Input Default State
• 50 W Internal Termination Resistor
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
8
1
SOIC−8 NB
D SUFFIX
CASE
751−07
8
1
TSSOP−8
DT SUFFIX
CASE
948R−02
DFN−8
MN SUFFIX
CASE 506AA
MARKING DIAGRAMS*
8
KEP63
ALYW
G
1
8
KP63
ALYWG
G
1
14
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M = Date Code
G = Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping^†
MC100EP16VTDG
SOIC−8 NB
(Pb-Free)
98 Units/Tube
MC100EP16VTDR2G SOIC−8 NB 2500/Tape & Reel
(Pb-Free)
MC100EP16VTDTG
TSSOP−8
(Pb-Free)
100 Units/Tube
MC100EP16VTDTR2G TSSOP−8 2500/Tape & Reel
(Pb-Free)
MC100EP16VTMNR4G DFN−8 1000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
1
August, 2016 − Rev. 5
Publication Order Number:
MC100EP16VT/D