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MC100EP105 Datasheet, PDF (1/8 Pages) ON Semiconductor – 3.3V / 5VECL Quad 2-Input Differential AND/NAND
MC10EP105, MC100EP105
3.3V / 5VĄECL Quad 2-Input
Differential AND/NAND
The MC10/100EP105 is a quad 2–input differential AND/NAND
gate. Each gate is functionally equivalent to the EP05 and LVEL05
devices. With AC performance much faster than the LVEL05 device,
the EP105 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
• 275 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = –3.0 V to –5.5 V
• Open Input Default State
• Safety Clamp on Inputs
http://onsemi.com
MARKING
DIAGRAM*
LQFP–32
FA SUFFIX
CASE 873A
MCxxx
EP105
AWLYYWW
32
1
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
Device
Package
Shipping
MC10EP105FA
LQFP–32 250 Units/Tray
MC10EP105FAR2 LQFP–32 2000 Tape & Reel
MC100EP105FA LQFP–32 250 Units/Tray
MC100EP105FAR2 LQFP–32 2000 Tape & Reel
© Semiconductor Components Industries, LLC, 2002
1
September, 2002 – Rev. 8
Publication Order Number:
MC10EP105/D