MC100EL91_06 Datasheet, PDF (1/6 Pages) ON Semiconductor – 5 V Triple PECL Input to −5 V ECL Output Translator

MC100EL91
5 V Triple PECL Input to
−5 V ECL Output Translator
Description
The MC100EL91 is a triple PECL input to ECL output translator.
The device receives standard voltage differential PECL signals,
determined by the V_CC supply level, and translates them to differential
−5 V ECL output signals. (For translation of LVPECL to −3.3 V ECL
output, see MC100LVEL91.)
To accomplish the level translation, the EL91 requires three power
rails. The V_CC supply should be connected to the positive supply, and
the V_EE pin should be connected to the negative power supply. The
GND pins are connected to the system ground plane. Both V_EE and
V_CC should be bypassed to ground via 0.01 mF capacitors.
Under open input conditions, the D input will be biased at V_CC/2
and the D input will be pulled to GND. This condition will force the Q
output to a low, ensuring stability.
The V_BB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to V_BB as a switching reference voltage.
V_BB may also rebias AC coupled inputs. When used, decouple V_BB
and V_CC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V_BB should be left open.
Features
• 670 ps Typical Propagation Delay
• ESD Protection: >2 kV Human Body Model
• The 100 Series Contains Temperature Compensation
• Operating Range:V_CC = 4.75 V to 5.5 V;
V_EE = −4.2 V to −5.5 V; GND = 0 V
• Internal Input Pulldown Resistors
• Q Output will Default LOW with Inputs Open or at GND
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 282 devices
• Pb−Free Package is Available*
http://onsemi.com
SO−20 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
20
100EL91
AWLYYWWG
1
A
= Assembly Location
WL = Wafer Lot
YY
= Year
WW = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 6
Publication Order Number:
MC100EL91/D