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DTC144TT1 Datasheet, PDF (1/8 Pages) ON Semiconductor – NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network | |||
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DTC144TT1
Preferred Device
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a baseâemitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SCâ59
package which is designed for low power surface mount applications.
⢠Simplifies Circuit Design
⢠Reduces Board Space
⢠Reduces Component Count
⢠Moisture Sensitivity Level: 1
⢠ESD Rating â Human Body Model: Class 1
ESD Rating â Machine Model: Class B
⢠The SCâ59 package can be soldered using wave or reflow. The
modified gullâwinged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
⢠Available in 8 mm embossed tape and reel
Use the Device Number to order the 7 inch/3000 unit reel.
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD
230 (Note 1.)
mW
338 (Note 2.)
1.8 (Note 1.)
°C/W
2.7 (Note 2.)
Thermal Resistance â
Junction-to-Ambient
RθJA
540 (Note 1.)
370 (Note 2.)
°C/W
Thermal Resistance â
Junction-to-Lead
RθJL
264 (Note 1.)
287 (Note 2.)
°C/W
Junction and Storage
Temperature Range
TJ, Tstg â55 to +150
°C
DEVICE MARKING AND RESISTOR VALUES
Device
Marking R1 (K) R2 (K)
Shipping
DTC144TT1
8T
47
1. FRâ4 @ Minimum Pad
2. FRâ4 @ 1.0 x 1.0 inch Pad
â
3000/Tape & Reel
http://onsemi.com
NPN SILICON
BIAS RESISTOR
TRANSISTOR
PIN 2
R1
BASE
(INPUT)
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
EMITTER
(GROUND)
3
1
2
SCâ59
CASE 318D
STYLE 1
MARKING DIAGRAM
8T M
8T = Specific Device Code
M = Date Code
ORDERING INFORMATION
Device
Package
Shipping
DTC144TT1
SCâ59
3000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2002
1
May, 2002 â Rev. 1
Publication Order Number:
DTC144TT1/D
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