D45C12 Datasheet, PDF (1/3 Pages) ON Semiconductor – Complementary Silicon Power Transistor

D45C12 (PNP),
D44C12 (NPN)
Complementary Silicon
Power Transistor
The D45C12 and D44C12 areĂfor general purpose driver or
medium power output stages in CW or switching applications.
Features
•ăLow Collector-Emitter Saturation Voltage - 0.5 V (Max)
•ăHigh f_t for Good Frequency Response
•ăLow Leakage Current
•ăPb-Free Packages are Available*
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Rating
Symbol Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector-Emitter Voltage}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector-Emitter Voltage}
V_CEO
80
Vdc
VCES
90
Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Emitter Base Voltage}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Collector Current - Continuous}
Peak (Note 1)
V_EB
5.0
Vdc
I_C
4.0
Adc
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Total Power Dissipation @ TC = 25°C
Total Power Dissipation @ T_A = 25°C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Operating and Storage Junction}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Temperature Range}
P_D
T_J, T_stg
30
1.67
-ā55 to 150
W
W/°C
°C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Operating Conditions is not implied. Extended exposure to stresses above the}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Recommended Operating Conditions may affect device reliability.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{THERMAL CHARACTERISTICS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Characteristic}
Symbol
Max
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Thermal Resistance,
Junction-to-Case
R_qJC
4.2
°C/W
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Thermal Resistance,
Junction-to-Ambient
R_qJA
75
°C/W
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Maximum Lead Temperature for Soldering TL}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Purposes: 1/8 in from Case for 5 Sec}
275
°C
1. Pulse Width v 6.0 ms, Duty Cycle v 50%.
http://onsemi.com
4.0 AMPERE COMPLEMENTARY
SILICON POWER
TRANSISTORS 80 VOLTS
4
1
2
3
TO-220AB
CASE 221A
STYLE 1
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Collector
D4xC12G
AYWW
1
Base
3
Emitter
2
Collector
x
= 4 or 5
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb-Free Package
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©Ă Semiconductor Components Industries, LLC, 2007
1
November, 2007 - Rev. 2
Publication Order Number:
D45C12/D