CS5165A Datasheet, PDF (1/18 Pages) ON Semiconductor – 5−Bit Synchronous CPU Buck Controller

CS5165A
5−Bit Synchronous CPU
Buck Controller
The CS5165A synchronous 5−bit NFET buck controller is
optimized to manage the power of the next generation Pentium II
processors. It’s V²t control architecture delivers the fastest transient
response (100 ns), and best overall voltage regulation in the industry
today. It’s feature rich design gives end users the maximum flexibility
to implement the best price/performance solutions for their end
products.
The CS5165A has been carefully crafted to maximize performance and
protect the processor during operation. It has a 5−bit DAC on board that
holds a ±1.0% tolerance over temperature. Its on board programmable
Soft−Start insures a control startup, and the FET nonoverlap circuitry
ensures that both FETs do not conduct simultaneously.
The on board oscillator can be programmed up to 1.0 MHz to give
the designer maximum flexibility in choosing external components
and setting systems costs.
The CS5165A protects the processor during potentially catastrophic
events like overvoltage (OVP) and short circuit. The OVP feature is
part of the V² architecture and does not require any additional
components. During short circuit, the controller pulses the MOSFETs
in a “hiccup” mode (3.0% duty cycle) until the fault is removed. With
this method, the MOSFETs do not overheat or self destruct.
The CS5165A is designed for use in both single processor desktop and
multiprocessor workstation and server applications. The CS5165A’s
current sharing capability allows the designer to build multiple parallel
and redundant power solutions for multiprocessor systems.
The CS5165A contains other control and protection features such as
Power Good, ENABLE, and adaptive voltage positioning. It is
available in a 16 lead SOIC wide body package.
Features
• V² Control Topology
• Dual N−Channel Design
• 100 ns Controller Transient Response
• Excess of 1.0 MHz Operation
• 5−Bit DAC with 1.0% Tolerance
• Power Good Output With Internal Delay
• Enable Input Provides Micropower Shutdown Mode
• 5.0 V and 12 V Operation
• Adaptive Voltage Positioning
• Remote Sense Capability
• Current Sharing Capability
• V_CC Monitor
• Hiccup Mode Short Circuit Protection
• Overvoltage Protection (OVP)
• Programmable Soft−Start
• 150 ns PWM Blanking
• 65 ns FET Nonoverlap Time
• 40 ns Gate Rise and Fall Times (3.3 nF Load)
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
October, 2005 − Rev. 1
http://onsemi.com
MARKING
DIAGRAM
16
1
16
SO−16WB
DW SUFFIX
CASE 751G
CS5165A
AWLYYWWG
1
CS5165A
A
WL
YY
WW
G
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
1
V_ID0
V_ID1
V_ID2
V_ID3
SS
V_ID4
C_OFF
ENABLE
16
V_FB
COMP
LGND
PWRGD
GATE(L)
PGND
GATE(H)
V_CC
ORDERING INFORMATION
Device
Package Shipping^†
CS5165AGDW16 SOIC−16 47 Units/Rail
CS5165AGDW16G SOIC−16 47 Units/Rail
(Pb−Free)
CS5165AGDWR16 SOIC−16 1000/Tape & Reel
CS5165AGDWR16G SOIC−16 1000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
CS5165A/D