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CS5165 Datasheet, PDF (1/21 Pages) Cherry Semiconductor Corporation – Fast, Precise 5-Bit Synchronous Buck Controller for the Next Generation Low Voltage Pentium II Processors
CS5165
5−Bit Synchronous CPU
Buck Controller
The CS5165 synchronous 5−bit NFET buck controller is optimized to
manage the power of the next generation Pentium II processors. It’s
V2™ control architecture delivers the fastest transient response (100 ns),
and best overall voltage regulation in the industry today. It’s feature rich
design gives end users the maximum flexibility to implement the best
price/performance solutions for their end products.
The CS5165 has been carefully crafted to maximize performance and
protect the processor during operation. It has a 5−bit DAC on board that
holds a ±1.0% tolerance over temperature. Its on board programmable
Soft Start insures a control start up, and the FET nonoverlap circuitry
ensures that both FETs do not conduct simultaneously.
The on board oscillator can be programmed up to 1.0 MHz to give
the designer maximum flexibility in choosing external components
and setting systems costs.
The CS5165 protects the processor during potentially catastrophic
events like overvoltage (OVP) and short circuit. The OVP feature is
part of the V2 architecture and does not require any additional
components. During short circuit, the controller pulses the MOSFETs
in a “hiccup” mode (3.0% duty cycle) until the fault is removed. With
this method, the MOSFETs do not overheat or self destruct.
The CS5165 is designed for use in both single processor desktop and
multiprocessor workstation and server applications. The CS5165’s
current sharing capability allows the designer to build multiple
parallel and redundant power solutions for multiprocessor systems.
The CS5165 contains other control and protection features such as
Power Good, ENABLE, and adaptive voltage positioning. It is
available in a 16 lead SOIC wide body package.
Features
• V2 Control Topology
• Dual N−Channel Design
• 100 ns Controller Transient Response
• Excess of 1.0 MHz Operation
• 5−Bit DAC with 1.0% Tolerance
• Power Good Output With Internal Delay
• Enable Input Provides Micropower Shutdown Mode
• 5.0 V & 12 V Operation
• Adaptive Voltage Positioning
• Remote Sense Capability
• Current Sharing Capability
• VCC Monitor
• Hiccup Mode Short Circuit Protection
• Overvoltage Protection (OVP)
• Programmable Soft Start
• 150 ns PWM Blanking
• 65 ns FET Nonoverlap Time
• 40 ns Gate Rise and Fall Times (3.3 nF Load)
© Semiconductor Components Industries, LLC, 2001
1
July, 2006 − Rev. 4
http://onsemi.com
16
1
SO−16L
DW SUFFIX
CASE 751G
MARKING
DIAGRAM
16
CS5165
AWLYYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
1
VID0
VID1
VID2
VID3
SS
VID4
COFF
ENABLE
16
VFB
COMP
LGND
PWRGD
GATE(L)
PGND
GATE(H)
VCC
ORDERING INFORMATION
Device
Package
Shipping
CS5165GDW16
CS5165GDWR16
SO−16L 46 Units/Rail
SO−16L 1000 Tape & Reel
Publication Order Number:
CS5165/D