AX8052F100_16 Datasheet, PDF (1/22 Pages) ON Semiconductor – Ultra-Low Power Microcontroller

AX8052F100
Ultra-Low Power
Microcontroller
OVERVIEW
The AX8052F100 is a single chip ultra−lowpower microcontroller
primarily for use in radio applications. The AX8052F100 contains a
high speed microcontroller compatible to the industry standard 8052
instruction set. It contains 64 kBytes of FLASH and 8.25 kBytes of
internal SRAM. The AX8052F100 features 3 16−bit general purpose
timers with SD capability, 2 output compare units for generating
PWM signals, 2 input compare units to record timings of external
signals, 2 16−bit wakeup timers, a watchdog timer, 2 UARTs, a
Master/Slave SPI controller, a 10−bit 500 kSample/s A/D converter,
2 analog comparators, a temperature sensor, a 2 channel DMA
controller, and a dedicated AES crypto controller. Debugging is aided
by a dedicated hardware debug interface controller that connects using
a 3−wire protocol (1 dedicated wire, 2 shared with GPIO) to the PC
hosting the debug software.
www.onsemi.com
1 28
QFN28 5x5, 0.5P
CASE 485EH
ORDERING INFORMATION
Device
Type
Qty
AX8052F100−2−TA05 Tape & Reel
500
AX8052F100−2−TW30 Tape & Reel
3,000
Features
Ultra−low Power Microcontroller
• QFN28 Package
• Supply Range 1.8 V − 3.6 V
• −40°C to 85°C
• Ultra−low Power Consumption:
♦ CPU Active Mode 150 mA/MHz
♦ Sleep Mode with 256 Byte RAM Retention and
Wake−up Timer running 850 nA
♦ Sleep Mode 4 kByte RAM Retention and Wake−up
Timer running 1.5 mA
♦ Sleep Mode 8 kByte RAM Retention and Wake−up
Timer running 2.2 mA
AX8052 Core
• Industry Standard 8052 Instruction Set
• High Performance Core, most Instructions Require only
1 Clock per Instruction Byte
• 20 MIPS
• Dual DPTR for High Speed Memory Chips
• 22 Interrupt Vectors
Debugger
• Three−wire (1 dedicated, 2 shared with GPIO Pins)
Debugger Interface
• True Hardware Debugger with Breakpoints and Single
Stepping Support
• User Programmable 64−bit Key to restrict Debugging
to Authorized Personnel
• DebugLink Interface allows “printf” Style Debugging
without utilizing a UART or GPIO Pins
Memory
• 64 kByte FLASH
100,000 Erase Cycles
10 Year Data Retention
• 8.25 kByte RAM
• High Performance Memory Crossbar
Clocking
• Four Clock Sources
♦ On−chip 20 MHz RC−oscillator
♦ 10 kHz/640 Hz Ultra−low−power RC−oscillator
♦ Fast Crystal Oscillator
♦ Low Power Tuning Fork Crystal Oscillator
• Fully Automatic Calibration of On−chip RC Oscillators
to a Reference Clock
• Clock Monitor can Detect Failures of the Main Clock
and Switch to the On−chip Fast RC Oscillator
• Watchdog
Power Modes
• Standby, Sleep and Deep Sleep Power Modes for Very
Low Idle Power Consumption
• On−chip Power−on−Reset and Brown−out Detection
• Unrestricted Operation from 1.8 V − 3.6 V VDD_IO
16−bit Wakeup Timer
• Two Counting Registers
• Four Event Registers Allow Flexible Wakeup and
Software Schedules
© Semiconductor Components Industries, LLC, 2016
1
May, 2016 − Rev. 3
Publication Order Number:
AX8052F100/D