ASM3P2590A Datasheet, PDF (1/7 Pages) PulseCore Semiconductor – Low Power Peak EMI Reducing Solution

ASM3P2590A
Peak EMI
Reducing Solution
Features
• Generates a 1X low EMI optimized clock signal at
the output.
• Integrated loop filter components.
• Operates with a 3.3 / 2.5V Supply.
• Operating current less than 5mA.
• CMOS design.
• Input frequency range
60MHz to 120MHz for 2.5V
60MHz to 120MHz for 3.3V
• Frequency deviation: ±0.75% (Typ) @ 85MHz Output
frequency.
• Available in 6L-TSOP (6L-TSOT-23) Package.
Product Description
The ASM3P2590A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2590A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2590A allows significant
system cost savings by reducing the number of circuit
board layers, ferrite beads and shielding that are
traditionally required to pass EMI regulations.
The ASM3P2590A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2590A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This result in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The ASM3P2590A is targeted towards all portable
devices with very low power requirements like MP3
players, MFP, LCD Panel Module and digital still
cameras.
Key Specifications
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
VDD = 3.3V / 2.5V
±360pS (Typ)
45/55%
FIN/2560
±0.75% (Typ) @ 85MHz
Output
Block Diagram
VDD
SSON
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
Publication Order Number:
ASM3P2590/D