ASM3P2107A Datasheet, PDF (1/6 Pages) Alliance Semiconductor Corporation – Peak EMI Reducing Solution

ASM3P2107A
Peak EMI Reducing Solution
Features
• FCC approved method of EMI attenuation.
• Generates a 1X low EMI spread spectrum clock of
the input frequency.
• Input frequency range: 12MHz to 22MHz.
• Internal loop filter minimizes external components
and board space.
• Frequency deviation: - 0.8%( Typ) @ 20MHz.
• Low cycle-to-cycle jitter.
• 5.0V ± 5% operating voltage range.
• TTL or CMOS compatible outputs.
• Available in 8-pin TSSOP and SOIC package.
Product Description
The ASM3P2107A is a versatile spread spectrum
frequency modulator designed specifically for input clock
frequencies from 12MHz to 22MHz. The ASM3P2107A
can generate an EMI reduced clock from crystal, ceramic
resonator, or system clock.
The ASM3P2107A reduces electromagnetic interference
(EMI) at the clock source, allowing system wide reduction
of EMI of down stream clock and data dependent signals.
The ASM3P2107A allows significant system cost savings
Block Diagram
by reducing the number of circuit board layers, ferrite
beads, shielding, and other passive components that are
traditionally required to pass EMI regulations.
The ASM3P2107A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The ASM3P2107A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The ASM3P2107A is targeted towards EMI management
for high speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
VDD
XIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
CLOCKOUT
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
GND
Publication Order Number:
ASM3P2107/D