English
Language : 

74HC04 Datasheet, PDF (1/7 Pages) NXP Semiconductors – Hex inverter
74HC04
Hex Inverter
High−Performance Silicon−Gate CMOS
The 74HC04 is identical in pinout to the LS04 and the MC14069.
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
The device consists of six three−stage inverters.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 36 FETs or 9 Equivalent Gates
• These are Pb−Free Devices
LOGIC DIAGRAM
A1 1
2 Y1
3
A2
4
Y2
5
A3
9
A4
6
Y3
Y=A
8
Y4
11
A5
10
Y5
A6 13
12 Y6
Pinout: 14−Lead Packages (Top View)
VCC A6 Y6 A5 Y5 A4 Y4
14 13 12 11 10 9 8
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
HC04G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
04
ALYW G
G
1
HC04 = Device Code
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Outputs
A
Y
L
H
H
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1234567
A1 Y1 A2 Y2 A3 Y3 GND
© Semiconductor Components Industries, LLC, 2007
1
March, 2007 − Rev. 1
Publication Order Number:
74HC04/D