74HC02 Datasheet, PDF (1/7 Pages) NXP Semiconductors – Quad 2-input NOR gate

74HC02
Quad 2−Input NOR Gate
High−Performance Silicon−Gate CMOS
The 74HC02 is identical in pinout to the LS02. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 40 FETs or 10 Equivalent Gates
• These are Pb−Free Devices
2
A1
3
B1
5
A2
6
B2
8
A3
9
B3
11
A4
12
B4
LOGIC DIAGRAM
1
Y1
4
Y2
Y=A+B
10
Y3
13
Y4
PIN 14 = V_CC
PIN 7 = GND
PIN ASSIGNMENT
Y1 1
A1 2
B1 3
Y2 4
A2 5
B2 6
GND 7
14 V_CC
13 Y4
12 B4
11 A4
10 Y3
9 B3
8 A3
14
1
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
HC02G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
02
ALYW G
G
1
HC02 = Device Code
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
A
B
L
L
L
H
H
L
H
H
Output
Y
H
L
L
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
1
March, 2007 − Rev. 1
Publication Order Number:
74HC02/D