0W344-004-XTP Datasheet, PDF (1/43 Pages) ON Semiconductor – 1.0 Genral Description

BelaSigna 200
1.0 General Description
BelaSigna 200 is a high-performance, programmable, mixed-signal digital signal processor (DSP) that is based on
ON Semiconductor’s patented second-generation SignaKlara™ technology.
This single-chip solution is ideally suited for embedded applications where audio performance, low power consumption and
miniaturization are critical. BelaSigna 200 targets a wide variety of digital speech- and audio-centric applications, including:
ƒ Communication headsets
ƒ Smart phones
ƒ Personal digital assistants (PDAs)
ƒ Hands-free car kits
ƒ Bluetooth™ wireless technology systems
BelaSigna 200 provides numerous analog and digital interfaces including parallel, serial, synchronous, and asynchronous interfaces to
facilitate the connection with transducers from various applications.
BelaSigna 200 contains two primary processing blocks, which all work together to provide a complete audio processing chain. The
analog section includes two 16-bit A/D converters and two 16-bit D/A converters. Two on-chip direct digital output stages allow
BelaSigna 200 to drive various output transducers directly, eliminating the need for external power amplifiers.
BelaSigna 200 features internal clock generation and power regulation for excellent noise and power performance. Two DSP
subsystems operate concurrently: the RCore, which is a fully programmable DSP core, and the weighted overlap-add (WOLA)
filterbank coprocessor, which is a dedicated, configurable processor that executes time-frequency domain transforms and other vector-
based computations. In addition to these processors, there are several other peripherals, which optimize the architecture to audio
processing, such as the onput/output processor (IOP) – an audio-targeted direct memory access (DMA) processor, which runs in the
background and manages the data flow between the converters and the two processors. The BelaSigna 200 functional block diagram is
shown in Figure 1.
©2008 SCILLC. All rights reserved.
June 2008 – Rev. 16
Figure 1: BelaSigna 200 Functional Block Diagram
Publication Order Number:
BELASIGNA200/D