MR27V6466F Datasheet, PDF (9/39 Pages) OKI electronic componets – 4,194,304-Word x 16Bit or 2,097,152-Word x 32-Bit Synchronous One Time PROM

1Semiconductor
PEDR27V6466F-01-08
MR27V6466F
ADDRESSING MAP
(1) WORD = “H”: x32 Organization
Pin Name
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
Row Address
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
Column Address
CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 X
X
X
X
X
( X = Don’t Care)
(2) WORD = “L”: x16 Organization
Pin Name
Row Address
Column Address
(3) Programming
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 RA10 RA11 RA12
CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 X
X
X
X
( X = Don’t Care)
Address displayed on
programmer: x16
Device Address: x16
STO = “H”, AMPX = “L”
Address (STO = “L”)
WORD = “L”: x16
Address (STO = “L”)
WORD = “H”: x32
Ad0
CAP0
CA0
Note1
Ad1
CAP1
Note2
CA1
CA0
Ad2
CAP2
Note3
CA2
Note4
CA1
Ad3
CAP3
CA3
Note5
CA2
Ad4
CAP4
CA4
CA3
Ad5
CAP5
CA5
CA4
Ad6
CAP6
CA6
CA5
Ad7
CAP7
CA7
CA6
Ad8
CAP8
CA8
CA7
Ad9
A0
RA0
RA0
Ad10 Ad11 Ad12
A1 A2 A3
RA1 RA2 RA3
RA1 RA2 RA3
Address displayed on
programmer: x16
Device Address: x16
STO = “H”, AMPX = “L”
Address (STO = “L”)
WORD = “L”: x16
Address (STO = “L”)
WORD = “H”: x32
Ad13
A4
RA4
RA4
Ad14
A5
RA5
RA5
Ad15
A6
RA6
RA6
Ad16
A7
RA7
RA7
Ad17
A8
RA8
RA8
Ad18
A9
RA9
RA9
Ad19
A10
RA10
RA10
Ad20
A11
RA11
RA11
Ad21
A12
RA12
RA12
Users of MR27V6466F are recommended to study the relationship between "Address displayed on programmer"
and "Address (STO = "L")" ignoring "Device Address: x16, STO = "H"".
The order of data on Synchronous Read operation (STO="L") is checked on this table.
"Device Address : x16, STO = "H"" will be utilized to design socket adapter on programmer or to check boards
designed to mount blank OTP and program OTP on board.
OKI will supply a socket adapter to program MR27V6466F as conventional x16 standard OTP. The users and the
venders of programmer who use the socket adapter can ignore "Device Address: x16, STO = "H"".
The persons who use 32Mbit SOTP and 64Mbit SOTP must be careful to distinguish the socket adapters for
64Mbit from one for 32Mbit. The difference is caused from the additional assignment of column address and 1 bit
shift of row address on 64Mbit SOTP
Note
1. A0 in programmer distinguishes upper word (x16) or lower word (x16) of Double word (x32).
On word (x16) organization the address of device corresponds to the address of programmer.
On double word (x32) organization the address numeral code of device is half of that in programmer, and
output on DQ0 to DQ15 is lower word (A0 = "0") and output on DQ16 to DQ31 is upper word (A0 = "1").
2. CA1 is MSB of burst read on condition of WORD = "L" and BL = 4.
3. CA2 is MSB of burst read on condition of WORD = "L" and BL = 8.
4. CA1 is MSB of burst read on condition of WORD = "H" and BL = 4.
5. CA2 is MSB of burst read on condition of WORD = "H" and BL = 8.
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