MSM7630 Datasheet, PDF (71/95 Pages) OKI electronic componets – Universal Speech Processor

¡ Semiconductor
MSM7630
4. SIO Register Addresses
SIO register addresses for the MSM7630 are shown below.
0xFA000000
0xFA000004
0xFA000008
0xFA00000C
0xFA000010
0xFA000014
0xFA000018
0xFA00001C
SIO Input Buffer
SIO Output Buffer
Baud Rate Adjustment Register
SIO Status Register
SIO Command Register
Modem Status Register
Modem Command Register
SIO Control Register
5. SIO Operation
There are two methods of SIO operation: start-stop transfers where communication is performed
synchronized to characters, and clock synchronized transfers where communication is performed
synchronized to the clock.
5.1 Clock Synchronized Transfers
Clock synchronized transfer mode is selected by setting the SCMD (Command Register) SMOD bit
to "1". In this mode 8-bit data will be input/output synchronized to the clock output from the SCLK
pin.
With clock synchronized transfers, transfer data is only 8 bits, so parity bits and flag bits cannot be
added. The SCMD (Command Register) SFBM bit, SFL bit, and SPTY bits will be set to "0", "0", and
"00" respectively.
5.1.1 Clock Synchronized Transfer Baud Rate
B=
f
8 ¥ n ¥ (256 – P)
where
B : baud rate
f : SCP clock frequency
n : baud rate parameter (set by SBR register’s SBRP bit)
P : baud rate adjustment value (set by SBR register’s SBRV bit)
Set SBR (Baud Rate Adjustment Register) to achieve the required baud rate.
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