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MSM6778 Datasheet, PDF (6/7 Pages) OKI electronic componets – 120-DOT COMMON DRIVER (TAB)
¡ Semiconductor
MSM6778
FUNCTIONAL DESCRIPTION
Pin Functional Description
• IO1, IO60, IO61, IO120
These are I/O pins of the two 60-bit bidirectional shift registers.
• SHL
This pin selects the shift direction of the two 60-bit bidirectional shift registers.
Set this pin to "H" or "L" level during power-on.
SHL Shift Direction
L
O1 Æ O60
O61 Æ O120
H
O60 Æ O1
O120 Æ O61
I/O pins
IO1, IO61
IO60, IO120
IO60, IO120
IO1, IO61
Function
Input IO1 and IO61 are data input pins for the shift
Output register. The entered data is read in at the falling
edge of a clock pulse. The data is output from
IO60 and IO120 behind the number of bits (60) of
the shift register.
Input IO60 and IO120 are data input pins for the shift
Output register. The entered data is read in at the falling
edge of a clock pulse. The data is output from IO1
and IO61 behind the number of bits (60) of the
shift register.
• CP
This is a clock pulse input for the two 60-bit bidirectional shift registers. Scan data is shifted at
the falling edge of a clock pulse.
• DF
This is a synchronous signal input for alternate signal for LCD driving.
• DISPOFF
This is an input used to control the output levels of O1 to O120. During low level input, the V1
level is output from the output pins O1 to O120 independently of the data of the shift register. See
the truth table.
• O1 to O120
These are outputs for the 4-level drivers, which correspond directly to each bit of the shift
register. One of the four levels V1, V2, V5, and VEE is selected and output depending on the
combination of the shift register data and a DF signal. See the Truth Table.
• V1L, V2L, V5L, VEEL, V1R, V2R, V5R, VEER
These are LCD drive bias voltage inputs.
• VDDL, VDDR, VSS
These are power supply pins for the device. VDD is usually from 2.7 V to 5.5 V and VSS is 0 V.
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