MSM7662 Datasheet, PDF (43/62 Pages) OKI electronic componets – NTSC/PAL Digital Video Decoder

¡ Semiconductor
PEDL7662-02
MSM7662
Sync separation level (SSEPL) Write only
<address: $0A>
Register Name
Default
Recommended Value
SSEPL
[7]
0
0
SSEPL
[6]
0
0
SSEPL
[5]
0
0
SSEPL
[4]
0
0
SSEPL
[3]
0
0
SSEPL
[2]
0
0
SSEPL
[1]
0
0
SSEPL
[0]
0
0
SSEPL[7] Pedestal Clamp on/off
*0: Do not use pedestal clamp.
1: Use pedestal clamp (AGC stops operating).
SSEPL[6:0] Sync. separation level
$40 to $3F (*$00): –64 to +63
Note: The default setting outputs the pedestal position as a black level.
Chrominance Control (CHRC) Write only
<address: $0B>
Register Name
Default
Recommended Value
CHRC[7] CHRC[6] CHRC[5] CHRC[4] CHRC[3] CHRC[2] CHRC[1] CHRC[0]
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
1
CHRC[7:4] Undefined
Set to 0
CHRC[3] C-Output level limiter
*0: OFF
1: ON
Note: Control range while limiter is ON: 16 to 224
CHRC[2] Chroma bandpass filter
0: OFF
*1: ON
CHRC[1:0] Color kill threshold factor 00: 0.500 color burst level
*01: 0.250 color burst level
10: 0.125 color burst level
11: Color killer off
Note: The color killer decision level is selected based upon color burst ratio.
ACC Loop filter control (ACCLF)
Write only
<address: $0C>
Register Name
Default
Recommended Value
ACCLF ACCLF ACCLF ACCLF ACCLF ACCLF ACCLF ACCLF
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
ACCLF[7] Undefined
Set to 0
ACCLF[6:5] ACC loop filter time constant
00: slow
*01: medium
10: fast
11: MCC mode
Note: The ACC convergence time is determined. These registers converge about 4 times
faster by slow-medium-fast steps. In the MCC mode, the amplification is determined
by reference level.
ACCLF[4:0] ACC reference level
$10 to $0F (*$00): –16 to +15
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