MSC23S4641E Datasheet, PDF (4/11 Pages) OKI electronic componets – 4,194,304 Word x 64 Bit SYNCHRONOUS DYNAMIC RAM MODULE (2BANK):

SERIAL PRESENCE DETECT
MSC23S4641E-8BS16 (98.06.22)
Byte
SPD
Remark
Notes
No.
Hex Value
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36-61
62
63
64-71
72
80
08
04
0B
09
02
40
00
01
80
60
00
80
08
00
01
8F
02
06
01
01
00
06
C0
A0
00
00
14
14
14
30
04
20
10
20
10
00-00
12
2D
41,45,20,20,20,20,20,20
01/06
Defines the number of bytes written into 128 byte
SPD memory
Total number of bytes of SPD memory 256 byte
Fundamental memory type
SDRAM
Number of rows
11 rows
Number of columns
9 columns
Number of module banks
2 bank
Data width of this assembly
64 bits
... Data width continuation
0
Voltage interface level
LVTTL
Cycle time (CL=3)
CL=3 tCC=8ns
Access time from CLK (CL=3)
CL=3 tAC3=6ns
DIMM configuration type
Non Parity
Refresh rate / type
Normal/ Self/
Primary SDRAM width
x8
Error checking SDRAM width
Minimum CLK delay
tCCD: 1 CLK
Burst lengths supported
1,2,4,8,F
Number of banks on each SDRAM
2 banks
/CAS latency
2,3
/CS latency
0
/WE latency
0
SDRAM module attributes
SDRAM device attributes : General
Cycle time (CL=2)
CL=2 tCC2=12ns
Access time from CLK (CL=2)
CL=2 tAC2=10ns
Cycle time (CL=1)
Not support
Access time from CLK (CL=1)
Not support
Minimum ROW pulse width
tRP=20ns
/RAS to /RAS bank delay
tRRD=20ns
/RAS to /CAS delay
tRCD=20ns
Minimum /RAS precharge time
tRAS=48ns
Density of each bank on module
16MB
Command and address signal input setup time 2ns
Command and address signal input hold time 1ns
Data signal input setup time
2ns
Data signal input hold time
1ns
R.F.U
SPD data revision code
1.2
Checksum for byte 0-62
Manufacturer’s JEDEC ID code
Manufacturing location
73-90
91,92
93-125
126
127
128-255
43,32,33,53,34,36,34,31,45,
2D,38,42,53,31,36,20,20,20
20,20
00-00
64
F5
FF-FF
Manufacturer’s part number
Revision code
R.F.U
Intel specification frequency
Intel specification /CAS latency
Unused storage locations
C23S4641E-8BS16
100MHz
CLK0-3,CL=3