MSM6688_07 Datasheet, PDF (16/167 Pages) OKI electronic componets – ADPCM Solid-State Recorder IC

OKI Semiconductor
TIMING DIAGRAMS
Reset Function
V_DD
RESET (I)
FEDL6688-6688L-04
MSM6688/6688L
t_RST
t_REX
Undefined
Power down
Standby for record/playback
Reset operation in progress
Power Down by PDWN Pin
PDWN (I)
t_PDL
t_PDH
XT (I)
XT (O)
t_PX Note 1
Oscillation in progress
Oscillation in progress
t_BPD
Power down Postprocessing Standby
Note: 1. When an external clock is used, continue to apply the clock input to the XT terminal during
t_PX after the PDWN pin is set to a low level.
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